[vsipl++] vsipl++ porting

Jules Bergmann jules at codesourcery.com
Tue Apr 18 13:16:47 UTC 2006



syedmoin at dsl.net.pk wrote:
> Dear Sir,
>         am porting VSIPL++ to High Performance DSP i.e Analog Devices 
> TigerSharc TS201S.The FFT routine is provided by Analog Devices and i 
> have incorporated it as function ,calls are similar to FFTW. I am 
> confused wether to incorporate Matrix handling in native assembly or use 
> vsipl++ matrix classes

Syed,

That is very exciting!

Unfortunately, the FFT dispatch is one of the more complex parts of the 
library, so it is difficult to suggest exactly how to insert your Matrix 
FFT routines.  In general, I would recommend something like the following:

For Matrix FFTM (multiple 1-D FFT along either rows or columns of a matrix):

   - Determine if layout of input and output matrices is supported by
     the Sharc Matrix FFT routine (in particular element strides and
     row/column strides).  If supported, use the Matrix FFT routine.

   - If the layout is not supported, you can do one of two things:

      - Ask VSIPL++ to reorganize the data into a temporary buffer
        with the right layout

      - Check if the layout allows Sharc Vector FFT routines to
        be used.

We're currently updating the FFT dispatch mechanism to make it easier to 
plug new FFT back-ends in (such as the Sharc FFT routine).  We are also 
writing documentation on how to call external libraries from VSIPL++, 
which you may find useful.  I will update you on these as they are ready.

> 
> Anohter thing is TigerSharc has instruction level parallilsm and can 
> execute 4 instructions simultaneously how can i incorporate this thing
>

Are these SIMD type instructions that perform the same operation on 
multiple data values?

If so, the easiest way to incorporate them right now is to map specific 
VSIPL++ operations (such as '+') to an external routine that uses the 
SIMD instructions to add two vectors together.

The 1.0 release of the library does this for the IPP library (vsipl++ 
element-wise operations such as '+', '-', '*', etc get mapped into 
corresponding IPP functions).

Our most recent snapshot release of the library provides some generic 
SIMD functionality.  Using a traits class to describe the SIMD 
instructions (src/vsip/impl/simd/simd.hpp), it provides generic 
implementations of vector element-wise multiply 
(src/vsip/impl/simd/vmul.hpp).  Extending the traits to describe the 
SHARC's SIMD instructions would let VSIPL++ take advantage of those 
instructions.

http://www.codesourcery.com/public/vsiplplusplus/sourceryvsipl++-20060403.tar.bz2

Finally, in September 2006, we will release a version of the library 
that generates SIMD instructions for general loop fusion.  As that 
becomes available, we can work with you on how to best support the SHARC 
instructions.


If you don't mind, I have a few questions for you to help us serve you 
better:

  - Can you describe the systems that you are targeting?
      - Hardware: processor, memory, I/O
      - Parallelism: Do you have multiple processors?
      - Software: What compiler do you use?  What computation libraries
        do you use?  How do you communicate between multiple
        processors?  What RTOS do you use?

  - Do you use fixed-point or floating-point (or both)?

  - What types of applications are you developing?
     - signal processing?  image processing?
     - Is your system real-time?

  - How do you develop applications?
     - Do you primarily develop on the target hardware, or
     - Do you develop algorithms on the desktop and then
       port them?
     - Would you be interested in a Windows version of VISPL++?

				thanks,
				-- Jules

> 
> Regards
> Syed Moinuddin
> 
> 
> ----------------------------------------------------------------
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-- 
Jules Bergmann
CodeSourcery
jules at codesourcery.com
(650) 331-3385 x705



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