[coldfire-gnu-discuss] GCC Clobbering Branch Predict Bit in CF3 Cores

[Tom Evans]

Is this mailing list still alive? The last archived post was in 2011. The last 
post was in Oct 2012, but it isn't in the archive (yet)??

Has this list been replaced by this "community"?

http://communities.mentor.com/mgcx/community/embedded_software/sourcery_codebench?view=discussions


I've searched for this apparent bug on gcc.gnu.org/bugzilla, but didn't find 
anything.

I'm using:

$ m68k-elf-gcc --version
m68k-elf-gcc.exe (Sourcery G++ Lite 4.3-208) 4.3.3
Copyright (C) 2008 Free Software Foundation, Inc.

The command line is:

m68k-elf-gcc -MD -MF adl3.d0 -gdwarf-2 -mcpu=5329 -Wall -std=c99 -g  -Os ...

Note the "-mcpu=5329" line.

A small snippet of source code:

#define cd_BUS_OFF 0x2000
#define cd_BUS_OFF 0x1000
#define cd_OVERRUN 0x0008

     else if (cc->status & cd_BUS_OFF) {
40109020:       202a 003c       movel %a2@(60),%d0
40109024:       0800 000d       btst #13,%d0
40109028:       6710            beqs 4010903a <comm_check_status+0x58>
(other code)
     } else if (cc->status & cd_BUS_RWARN) {
4010903a:       0800 000c       btst #12,%d0
4010903e:       6604            bnes 40109044 <comm_check_status+0x62>
     } else if (cc->status & cd_OVERRUN) {
40109040:       44c0            movew %d0,%ccr
40109042:       6a02            bpls 40109046 <comm_check_status+0x64>

Note the weird word-saving trick in the last compare? It copies the data to 
the CCR and then tests the "N" bit.

It only seems to do this trick for the "N" and "Z" bits (bits 2 and 3). it 
should be able to do it for "C" and "V" (0 and 1), but I haven't seen any code 
doing this. I've also seen code like:

4012193e:       44c2            movew %d2,%ccr
40121940:       57c0            seq %d0
40121942:       44c2            movew %d2,%ccr
40121944:       5bc1            smi %d1

What's the problem? Bit 7 of the CCR is:

     Branch prediction (Version 3 only). Alters the static
     prediction algorithm used by the branch acceleration
     logic in the instruction fetch pipeline on forward
     conditional branches. Refer to a V3 core or device
     user?s manual for further information on this bit.

So the use of the "movew %d0,%ccr" instruction is changing the CPU's branch 
prediction randomly. It shouldn't be doing that.

Tom