Warning on use of Coldfire PIT (Programmable Interval Timer)

[Tom Evans]

I follow the Coldfire Forum at Freescale.

I spotted a post on a problem someone was having with the PIT losing 
time, thought about it over the weekend and came up with an explanation.

Which has the consequence that possibly everyone using the Coldfire PITs 
is using them the wrong way, and as a result the PITs are dropping 
counts and giving inaccurate timing. I've found Linux source code that 
looks to be doing the wrong thing.

This is because the Reference Manual doesn't match what the hardware 
does when the PIT PCSR is written to when acknowledging an interrupt. 
The standard Freescale Coldfire PIT header files (that define the chip) 
make life difficult to get this right.

One line summary:

When you write to the PIT PCSR to clear the PIF bit, you have to do it 
with a BYTE WRITE and not a WORD WRITE, as the latter resets the 
prescaler and loses counts.

Details here (link will probably wrap, you may need to paste it into 
your browser in bits):

http://forums.freescale.com/t5/68K-ColdFire-reg-Microprocessors/PIT-hw-boo-boo-Read-if-you-need-accurate-PIT-CF/m-p/60597#M9572

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Tom Evans