[coldfire-gnu-discuss] MCF547X/8X cache vs TAS instruction.

[Nathan Sidwell]

Mike Hench wrote:
> Search for the words "once per instruction" in the reference manual
> As in interrupts are sampled once per instruction
> It is mentioned in multiple places.
> Truth is I am assuming that once is between instructions.

It effectively is.  The Coldfire exception model is precise -- the interrupt 
handler will not observe partially updated state.

nathan
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