From nathan at codesourcery.com Mon Jun 1 07:08:00 2009 From: nathan at codesourcery.com (Nathan Sidwell) Date: Mon, 01 Jun 2009 08:08:00 +0100 Subject: [coldfire-gnu-discuss] MCF547X/8X cache vs TAS instruction. In-Reply-To: References: Message-ID: <4A237E50.50504@codesourcery.com> Mike Hench wrote: > Search for the words "once per instruction" in the reference manual > As in interrupts are sampled once per instruction > It is mentioned in multiple places. > Truth is I am assuming that once is between instructions. It effectively is. The Coldfire exception model is precise -- the interrupt handler will not observe partially updated state. nathan -- Nathan Sidwell :: http://www.codesourcery.com :: CodeSourcery From plyatov at gmail.com Tue Jun 2 07:38:06 2009 From: plyatov at gmail.com (Igor Plyatov) Date: Tue, 02 Jun 2009 11:38:06 +0400 Subject: support of MCF5249 Message-ID: <1243928286.7440.16.camel@homepc.home> Dear all, how can I compile code for Coldfire MCF5249? Which library configuration must be used for such processor and how to configure this? -- Igor Plyatov From nathan at codesourcery.com Wed Jun 3 06:33:10 2009 From: nathan at codesourcery.com (Nathan Sidwell) Date: Wed, 03 Jun 2009 07:33:10 +0100 Subject: [coldfire-gnu-discuss] support of MCF5249 In-Reply-To: <1243928286.7440.16.camel@homepc.home> References: <1243928286.7440.16.camel@homepc.home> Message-ID: <4A261926.9060906@codesourcery.com> Igor Plyatov wrote: > Dear all, > > how can I compile code for Coldfire MCF5249? > Which library configuration must be used for such processor and how to > configure this? -mcpu=5249 is all you need. nathan -- Nathan Sidwell :: http://www.codesourcery.com :: CodeSourcery