[arm-gnu] undefined instruction
Carlo Caione
carlo.caione at gmail.com
Wed May 16 19:43:15 UTC 2012
On Wed, May 16, 2012 at 1:04 AM, Carlos O'Donell
<carlos_odonell at mentor.com> wrote:
> What did you use to get this disassembly?
arm-none-aebi-gdb in eclipse. Without eclipse is (obviously :) the same:
(gdb) disassemble
Dump of assembler code for function strlen:
=> 0x40205c84 <+0>: beq 0x40205d18 <memcpy>
0x40205c88 <+4>: ; <UNDEFINED> instruction: 0xf03fe03a
0x40205c8c <+8>: andeq r0, r0, r6
0x40205c90 <+12>: andeq r0, r0, r4
0x40205c94 <+16>: andeq r0, r0, r7
0x40205c98 <+20>: andeq r0, r0, sp, lsl r0
0x40205c9c <+24>: ldrdmi r0, [r0], -r3
0x40205ca0 <+28>: ; <UNDEFINED> instruction: 0xffffffff
End of assembler dump.
> When you compile with -save-temps what does the output assembly look like before being assembled?
.section .text.strlen,"ax",%progbits
.align 2
.global strlen
.type strlen, %function
strlen:
.LFB83:
.loc 1 223 0
.cfi_startproc
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.LVL34:
.loc 1 223 0
mov r3, r0 @ ivtmp.163, s
.LVL35:
.L36:
.loc 1 226 0 discriminator 1
mov r2, r3 @ sc, ivtmp.163
.LVL36:
add r3, r3, #1 @ ivtmp.163, ivtmp.163,
.LVL37:
ldrb r1, [r2, #0] @ zero_extendqisi2 @ MEM[base:
sc_1, offset: 0B], MEM[base: sc_1, offset: 0B]
cmp r1, #0 @ MEM[base: sc_1, offset: 0B],
bne .L36 @,
.loc 1 229 0
rsb r0, r0, r2 @, s, sc
.LVL38:
bx lr @
.cfi_endproc
.LFE83:
.size strlen, .-strlen
This is the disassebly of the object file:
Disassembly of section .text.strlen:
00000000 <strlen>:
0: e1a03000 mov r3, r0
4: e1a02003 mov r2, r3
8: e2833001 add r3, r3, #1
c: e5d21000 ldrb r1, [r2]
10: e3510000 cmp r1, #0
14: 1afffffa bne 4 <strlen+0x4>
18: e0600002 rsb r0, r0, r2
1c: e12fff1e bx lr
> It might be that the mapping symbols are missing and your disassembling constant pool data.
>
> What are the .gnu_attribute flags for the object file?
I don't have any flags (If I have correctly understood what you mean).
--
Carlo
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